    vs_1_1
    dcl_texcoord v0
    dcl_texcoord1 v1
    mov a0.x, v1
    mov r3.xyz, c54[a0.x]
    mov r3.w, c0.y
    mov r4.x, c54[a0.x].w
    mad r0, c41, r4.x, r3
    mad r1, c42, r4.x, r3
    mad r2, c43, r4.x, r3
    dp4 r3.x, r0, c46
    dp4 r3.y, r0, c47
    dp4 r3.zw, r0, c48
    rcp r7.x, r3.z
    mul r3.xy, r3.xyyy, r7.x
    dp4 r5.x, r1, c46
    dp4 r5.y, r1, c47
    dp4 r5.zw, r1, c48
    max r5.z, r5.z, c0.w
    rcp r7.x, r5.z
    mul r5.xy, r5.xyyy, r7.x
    dp4 r6.x, r2, c48
    sge r0, r6.x, c38.w
    add r7, r2.xyzz, -c38.xyzz
    dp3 r7, r7, r7
    rsq r7, r7.w
    rcp r7, r7.w
    mul r1.xy, r7.x, c50.xzzz
    add r1.xy, r1.xyyy, c50.ywww
    min r1, r1, c0.y
    max r1, r1, c0.x
    mul r1, r1.x, r1.y
    mov oD0.xyz, c40.w
    mul oD0.w, r1, r0
    mul r0.x, v0.x, c45.y
    add r0.x, r0.x, c45.x
    add r7.x, r0.x, -c44.x
    mul r7.x, r7.x, r4.x
    add r7.x, r7.x, r7.x
    rcp r8.x, r6.x
    mul r7.x, r7.x, r8.x
    add r8.x, v0.y, -c44.y
    mul r8.x, r8.x, c45.z
    add r4, r5, -r3
    mad r4, r4, r8.x, r3
    add r4.x, r4.x, r7.x
    mul r4.xy, r4.xyyy, c39.xyyy
    mul r5.x, r6.x, c40.y
    mad r4.z, r4.z, c40.x, r5.x
    rcp r3.x, r4.z
    mul r4.z, r3.x, c39.z
    add r4.z, r4.z, c39.w
    mad oT1.xy, r4.xyyy, c49.xyyy, c49.zwww
    mov oT1.zw, c0.y
    sge r8, r1, c40.z
    mul r4, r8, r4
    mov r4.w, c0.y
    mov oPos, r4
    mov oT0, v0
    mov oT0.x, r0.x
    dp4 r3.x, r2, c2
    mov r3.w, c0.y
    min r3.x, r3.x, r3.w
    mad oFog, r3.x, -c18.w, r3.w

// approximately 61 instruction slots used
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